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<div class="title">audiogen_drv.h File Reference</div>  </div>
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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
<div class="textblock"><p>This file contains . </p>
<pre>
MODIFICATION HISTORY:</pre><pre>Ver   Who  Date        Changes
</p>
<hr/>
<p>
X.XX  XX  YYYY/MM/DD   ...
1.00  RHe 2014/12/00   First release
1.1   RHe 2015/07/30   Updated ACR GetNVal to be dependent of the
                       TMDS character rate instead of the video mode.
1.2   NA  2017/04/28   Updated the XhdmiAudioGen_PLL_t struct to be able to
                       set fractional multipliers and dividers.
1.3   RHe 2017/07/31   Updated ACR CTS generation for HDMI 2.0 formats.
1.4   MMO 2017/09/05   Replace U32 with UINTPTR for 64 Bit Addressing Support
</pre> </div><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:a54032017588d2fc51e5632662318220d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="audiogen__drv_8h.html#a54032017588d2fc51e5632662318220d">XAudGen_In32</a>&#160;&#160;&#160;Xil_In32</td></tr>
<tr class="memdesc:a54032017588d2fc51e5632662318220d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input Operations.  <a href="#a54032017588d2fc51e5632662318220d">More...</a><br/></td></tr>
<tr class="separator:a54032017588d2fc51e5632662318220d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac092aef14372cdc316d142336d855ec6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="audiogen__drv_8h.html#ac092aef14372cdc316d142336d855ec6">XAudGen_Out32</a>&#160;&#160;&#160;Xil_Out32</td></tr>
<tr class="memdesc:ac092aef14372cdc316d142336d855ec6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Output Operations.  <a href="#ac092aef14372cdc316d142336d855ec6">More...</a><br/></td></tr>
<tr class="separator:ac092aef14372cdc316d142336d855ec6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a32eb5f44dc9631db2600edd337de5e35"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="audiogen__drv_8h.html#a32eb5f44dc9631db2600edd337de5e35">XAudGen_ReadReg</a>(BaseAddress, RegOffset)&#160;&#160;&#160;<a class="el" href="audiogen__drv_8h.html#a54032017588d2fc51e5632662318220d">XAudGen_In32</a>((BaseAddress) + ((u32)RegOffset))</td></tr>
<tr class="memdesc:a32eb5f44dc9631db2600edd337de5e35"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function macro reads the given register.  <a href="#a32eb5f44dc9631db2600edd337de5e35">More...</a><br/></td></tr>
<tr class="separator:a32eb5f44dc9631db2600edd337de5e35"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1f8b21c2dd98f173e0f58038514a832d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="audiogen__drv_8h.html#a1f8b21c2dd98f173e0f58038514a832d">XAudGen_WriteReg</a>(BaseAddress, RegOffset, Data)&#160;&#160;&#160;<a class="el" href="audiogen__drv_8h.html#ac092aef14372cdc316d142336d855ec6">XAudGen_Out32</a>((BaseAddress) + ((u32)RegOffset), (u32)(Data))</td></tr>
<tr class="memdesc:a1f8b21c2dd98f173e0f58038514a832d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write the given register.  <a href="#a1f8b21c2dd98f173e0f58038514a832d">More...</a><br/></td></tr>
<tr class="separator:a1f8b21c2dd98f173e0f58038514a832d"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="a54032017588d2fc51e5632662318220d"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XAudGen_In32&#160;&#160;&#160;Xil_In32</td>
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<p>Input Operations. </p>

</div>
</div>
<a class="anchor" id="ac092aef14372cdc316d142336d855ec6"></a>
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          <td class="memname">#define XAudGen_Out32&#160;&#160;&#160;Xil_Out32</td>
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<p>Output Operations. </p>

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          <td class="memname">#define XAudGen_ReadReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;<a class="el" href="audiogen__drv_8h.html#a54032017588d2fc51e5632662318220d">XAudGen_In32</a>((BaseAddress) + ((u32)RegOffset))</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function macro reads the given register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>is the base address of the Audio Generator core. </td></tr>
    <tr><td class="paramname">RegOffset</td><td>is the register offset of the register</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The 32-bit value of the register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: u32 <a class="el" href="audiogen__drv_8h.html#a32eb5f44dc9631db2600edd337de5e35" title="This function macro reads the given register. ">XAudGen_ReadReg(u32 BaseAddress, u32 RegOffset)</a> </dd></dl>

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<a class="anchor" id="a1f8b21c2dd98f173e0f58038514a832d"></a>
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          <td class="memname">#define XAudGen_WriteReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Data&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;<a class="el" href="audiogen__drv_8h.html#ac092aef14372cdc316d142336d855ec6">XAudGen_Out32</a>((BaseAddress) + ((u32)RegOffset), (u32)(Data))</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Write the given register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>is the base address of the Audio Generator core. </td></tr>
    <tr><td class="paramname">RegOffset</td><td>is the register offset of the register </td></tr>
    <tr><td class="paramname">Data</td><td>is the 32-bit value to write to the register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: void <a class="el" href="audiogen__drv_8h.html#a1f8b21c2dd98f173e0f58038514a832d" title="Write the given register. ">XAudGen_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)</a> </dd></dl>

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